Aldec Adds Celoxica's C-Based Synthesis to its Integrated FPGA Design Flow
Henderson, Nevada -- May 21st , 2003 -- Aldec, Inc., a pioneer in mixed language simulation and advanced design tools for ASIC and FPGA devices, announced today that its Active-HDL version 6.1 now supports C synthesis through its interface with Celoxica's DK2 Design Suite. By adding support for Celoxica's C-based FPGA synthesis tool, system designers are now able to support VHDL, Verilog, C/C++, and Celoxica's Handel-C™ from a common, unified environment.
"HDL designers have been benefiting from Active-HDL's integration and fast simulation performance for years. Through our collaboration with Celoxica, that same industry-leading performance can now also benefit C and C++ designers," stated Megan Moran, product marketing manager for Active-HDL. "By ensuring compatibility with Celoxica's DK2 Design Suite, the leading C synthesis tool on the market, Aldec is continuing to provide the most advanced FPGA design and verification software to an even greater range of hardware engineers."
Active-HDL 6.1 simultaneously supports HDL as well as C/C++ source code all the way through to implementation. Designers can use Active-HDL's leading design entry environment to develop code, and then invoke both HDL and C synthesis tools directly from its Design Flow Manager. Active-HDL's Design Flow Manager provides a flowchart and direct interface access to Celoxica's Handel-C-to-hardware DK Design Suite. Designers can access and control DK2 Design Suite directly from Active-HDL and translate their C and Handel-C-based designs to VHDL, Verilog or EDIF, which can then be integrated into Active-HDL's common kernel simulation environment.
Most Complete Language Support
With the evolution of digital designs, system designers are constantly looking for more efficient means and methods to develop source code and expedite time-to-market. Common support of the various source languages is critical so that designers do not have to allocate development time on unifying source code to a single language.
Celoxica's DK2 Design Suite makes designers more efficient by raising the level of design abstraction through the use of higher-level languages such as C, C++, SystemC or Handel-C. The Celoxica design methodology, called Software-Compiled System Design, improves productivity by generating device-optimized FPGA hardware directly to EDIF or human-readable RTL from C-based descriptions. This methodology also improves Quality of Design by allowing designers to find more optimal partitions between hardware and software.
Active-HDL's new interface with Celoxica offers designers the most complete FPGA design solution on the market. In the Active-HDL environment, C users can specify the output format of their C-synthesis (VHDL, Verilog or EDIF), set the top-level unit for C-synthesis as well as set the family, device and speed grade of the target silicon.
All of the C-synthesis results from Celoxica are back-annotated in the Active-HDL environment so that users do not have to switch between applications, for ease and efficiency in design. All synthesis results can be viewed in Active-HDL's synthesis log and modified accordingly in order to develop the most efficient end-device available.
"Celoxica is pleased that Aldec chose the DK Design Suite to extend the benefits of higher-level language design to their users," stated Graham McKenzie, Product Marketing Manager for Celoxica. "This new interface creates a complete FPGA environment joining the C-based productivity of Software-Compiled System Design with existing HDL methodology. This combination will give designers the fastest and most comprehensive route from source code to FPGA implementation."
About Celoxica
An innovator in system-level electronic design automation (EDA), Celoxica is the technology leader for Software-Compiled System Design, a process that accelerates design productivity by using high-level languages to directly drive design verification and implementation. Celoxica provides tools and services that support the co-design, verification and implementation of hardware and software through a platform-based design methodology. By providing a proven route to hardware design using software techniques, the Celoxica solutions redefine hardware and software partitioning to uniquely enable the use of reprogrammable logic devices in the development of electronics and reconfigurable systems. For more information, visit http://www.celoxica.com.
About Aldec
Aldec, Inc., a 19-year EDA tool provider, is committed to delivering high-performance, HDL-based design verification software for UNIX, Linux and Windows platforms. Aldec is dedicated and responsive to serving its customers' needs with its offices located around the globe. Continuous innovation, superior product quality and total commitment to customer service comprise the foundation of Aldec's strategic objectives. Additional information about Aldec is available at http://www.aldec.com.
Wendy Truax
HighPointe Communications
(503) 672-9073
wendy@hipcom.com
